Variation Estimation and Compensation Technique in Scaled LTPS TFT Circuits for Low-Power Low-Cost Applications

journal cmos integrated circuits circuit reliability elemental semiconductors low-power electronics silicon statistical analysis thin film transistors cmos technology si circuit reliability compensation technique delay variation four-finger structure inverter chain low-power low-cost application low-temperature polycrystalline-silicon thin-film transistor multifinger design technique multimodal delay distribution response surface method statistical simulation methodology unimodal distribution variation estimation cmos logic circuits cmos technology circuit simulation delay grain boundaries logic devices response surface methodology robustness substrates thin film transistors grain boundary (gb) low-temperature polycrystalline-silicon (ltps) process variation thin-film transistor (tft)