Home
News
PI & Lab Director
Research
Projects
Publications
Talks
Courses
Sponsors
Contact & Openings
conference
Variation Resilient Spin Torque Transfer MRAM (poster)
An Alternate Design Paradigm for Robust Spin-torque Transfer Magnetic RAM (STT MRAM) from Circuit/Architecture Perspective
Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future embedded applications. It provides desirable memory attributes such as fast access time, low cost, high density and non-volatility. However, variations in process …
Robust Heterogeneous System Design in Spintronics: Error Resilient Spin Torque MRAM (STT MRAM) Design
(Acceptance Rate: underline22%, 148 out of 684)
Variation-tolerant Spin-Torque Transfer (STT) MRAM array for yield enhancement
Modeling of failure probability and statistical design of Spin-Torque Transfer Magnetic Random Access Memory (STT MRAM) array for yield enhancement
(Acceptance Rate: underline23%, 147 out of 639)
Modeling of Failure Probability and Statistical Design of Spin-Torque Transfer Magnetic RAM (STT MRAM) Array for Yield Enhancement
A generic and reconfigurable test paradigm using Low-cost integrated Poly-Si TFTs
Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
(Acceptance Rate: underline39%, 74 out of 192)
High Performance and Low Power Electronics on Flexible Substrate
(Acceptance Rate*: underline13%)
Novel Variation-Aware Circuit Design of Scaled LTPS TFT for Ultra low Power, Low-Cost Applications
«
»
Cite
×