A Novel Reconfigurable Sensing Scheme for Variable Level Storage in Phase Change Memory

Jing Li, C. I. Wu, S. C. Lewis, J. Morrish, T. Y. Wang, R. Jordan, T. Maffitt, M. Breitwisch, A. Schrott, R. Cheek, H. L. Lung, C. Lam
DOI
Type
Conference paper
Publication
2011 3rd IEEE International Memory Workshop (IMW), May, 2011
conference cmos digital integrated circuits nand circuits flash memories phase change memories 2mcell pcm chip cmos technology nand flash analog resistance levels frequency 50 mhz phase change memory reconfigurable sensing scheme size 90 nm time 35 mus to 50 mus time 5 mus variable level storage word length 8 bit clocks electrical resistance measurement flash memory phase change materials radiation detectors resistance
Avatar
Jing Li
Eduardo D. Glandt Faculty Fellow and Associate Professor, Co-director for CyberSavvy Center

Attracted to all the big problems in computer system across the stack regardless the specific sub-areas.